Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs
S. Mehta, D. O' Hare, V. O' Brien, E. Thompson and B. Mullane (2020) Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs. IEEE Open Journal of Circuits and Systems :34-47